Network World

What’s causing the memory shortage?

The memory industry faced shortage issues in the past but those were partially due to the changing of memory format. When the ...
EDN

Debugging DDR memory interfaces using area-based triggers

DDR bus protocol allows signals to go idle, or tri-state, when they are not active. When debugging or performing JEDEC conformance measurements on the DDR interface, it is often necessary to perform ...
EDN

Synopsys’ New DesignWare DDR Explorer Tool Delivers Up to 20 Percent Improvement in DDR Memory Subsystem Efficiency

DesignWare DDR Explorer enables designers to optimize memory subsystems for power, performance and cost through a graphical simulation and analysis environment Explore and adjust Synopsys' DesignWare ...
Ars Technica

DDR vs SD

Well if you have the sis chipset and your doing the comparison I would say it will have about a 5% difference. However if you compare the sis chipset with sdram to say an nforce2 board with ddr there ...