The design of modern SOCs (systems on chips) requires increasingly thorough verification to ensure that manufacturers don’t spend millions on mask revisions when first silicon has problems. A widely ...

Verification engineers continually report that up to 70% of the total engineering time spent on verification is consumed by debug, particularly when relying on disparate tools across multiple vendors.

PCI-SIG’s Peripheral Component Interconnect Express Gen5 (PCIe Gen5) is a system protocol used primarily for data transfers at high rates in systems. A transfer rate of 32 Gb/s can be achieved by PCIe ...