EDN

Timing analysis tool expands FPGA and board design flows

Chronology has expanded its interactive timing analysis and timing diagram product – TimingDesigner – to include tighter integration with vendor-specific board design and FPGA flows. TimingDesigner ...
EDN

IC design tools: Threaded timing analysis rolls

Promising a dramatic speedup for timing analysis, Extreme DA Corp. this week will introduce a multithreaded static and statistical timing analyzer that runs on multicore CPU platforms. GoldTime uses ...
Yahoo Finance

Vector Expands Timing Analysis Expertise Through RocqStat Acquisition

NOVI, Mich., Jan. 20, 2026 (GLOBE NEWSWIRE) -- Vector Informatik, a leading solution provider for software-defined systems in automotive and beyond, has acquired the RocqStat software technology and ...
Semiconductor Engineering

Closing The Post-Silicon Timing Analysis Gap

Accurate static timing analysis is one of the most important steps in the development of advanced node semiconductor devices. Performance numbers are included in chip and system specifications from ...
Semiconductor Engineering

The Challenge Of Balancing Performance And Accuracy For Advanced Node Timing Signoff

As process nodes shrink, complexity, cost and overall risk expand. Process variability that once was once acceptable now becomes a critical item as operating voltage decreases. Simply adding design ...
Nature

Probabilistic Timing Analysis in Real-Time Systems

Probabilistic timing analysis represents an emergent paradigm in the evaluation of real-time systems, addressing inherent uncertainties that traditional worst-case execution time (WCET) methods ...
Electronic Design

Using Timing Constraints For Generating At-Speed Test Patterns

Handling timing exception paths in ATPG tools while creating at-speed patterns has always been a tough and tricky task. It is well understood that at-speed testing is a requirement for modern ...